A VLSI architecture of a decoder for trellis coded modulation using constellations designed for the Rayleigh channel

Author

Boutillon, Emmanuel ; Belfiore, Jean-Claude ; Demassieux, N.

Author_Institution

Telecom Paris, France

fYear

1994

fDate

1-5 May 1994

Firstpage

1265

Abstract

New N-dimensional constellations for the Rayleigh fading channel have been described previously. These constellations provide a diversity of order N and a gain of 10 dB to 14.5 dB at a BER of 10^-3 when compared to 16-QAM modulations. The decoding of a 4-dimensional 4096 points constellation seems unrealistic, even with today´s VLSI technology. This paper proposes algorithmic simplifications, which allow us to decrease the complexity of the implementation to a reasonable level. In addition, an architecture is also proposed for a VLSI decoder for a 34 Mb/s digital HDTV signal, and its complexity is evaluated

Keywords

Rayleigh channels; VLSI; decoding; digital television; error correction codes; high definition television; television equipment; trellis coded modulation; 10 to 14.5 dB; 34 Mbit/s; BER; Rayleigh channel; VLSI architecture; VLSI decoder; VLSI technology; algorithmic simplifications; constellations; decoding; digital HDTV signal; gain; implementation complexity; trellis coded modulation; Constellation diagram; Decoding; Detection algorithms; Error correction codes; Fading; HDTV; Modulation coding; Rayleigh channels; Telecommunications; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, 1994. ICC '94, SUPERCOMM/ICC '94, Conference Record, 'Serving Humanity Through Communications.' IEEE International Conference on

Conference_Location

New Orleans, LA

Print_ISBN

0-7803-1825-0

Type

conf

DOI

10.1109/ICC.1994.368900

Filename

368900