DocumentCode
2387395
Title
Full wafer integration of NEMS on CMOS by nanostencil lithography
Author
Arcamone, Julien ; Van den Boogaart, Marc A F ; Serra-Graells, F. ; Hansen, Sven ; Brugger, Jurgen ; Torres, Francesc ; Abadal, Gabriel ; Barniol, Nuria ; Perez-Murano, F.
Author_Institution
Spain Microsyst. Lab., Ecole Polytechnique Federale de Lausanne
fYear
2006
fDate
11-13 Dec. 2006
Firstpage
1
Lastpage
4
Abstract
Wafer scale nanostencil lithography is used to define 200 nm scale mechanically resonating silicon cantilevers monolithically integrated into CMOS circuits. We demonstrate the simultaneous patterning of ~2000 nano-devices by post-processing standard CMOS wafers using one single metal evaporation, pattern transfer to silicon and subsequent etch of the sacrificial layer. Resonance frequencies around 1.5 MHz were measured in air and vacuum and tuned by applying dc voltages of 10V and 1V respectively
Keywords
CMOS integrated circuits; cantilevers; micromechanical devices; nanolithography; 1 V; 10 V; 200 nm; CMOS technology; NEMS; metal evaporation; nanostencil lithography; pattern transfer; silicon cantilevers; Lithography; Nanoelectromechanical systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location
San Francisco, CA
Print_ISBN
1-4244-0438-X
Electronic_ISBN
1-4244-0439-8
Type
conf
DOI
10.1109/IEDM.2006.346830
Filename
4154249
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