Title :
Approach to shorten ULSI development lead-time by effective process condition editing and dynamic lot-progress control systems
Author :
Ishizuka, Hiroaki ; Takamori, Haruo ; Matsumoto, Shigeru ; Yamaguchi, Shingo ; Arakawa, Toshihiko
Author_Institution :
ULSI Process Technol. Dev. Center, Matsushita Electron. Corp., Kyoto, Japan
Abstract :
We have developed a CIM system for ULSI R&D lines, which has the following functions to improve the efficiency in editing process condition such as a process flow and a process recipe; (1) altering a process condition of many trial lots simultaneously, (2) reducing the operation of editing wafer specifications of each process step. Moreover, our CIM system controls dynamically the progress of trial lots by distinguishing two kinds of process steps which operators and engineers take charge of. By our CIM system, the time when an engineer edits the process condition of trial lots has become less than 1/5th in comparison with the previous CIM system.
Keywords :
ULSI; computer integrated manufacturing; integrated circuit design; integrated circuit manufacture; process control; production control; CIM system; ULSI R&D lines; ULSI development lead-time; dynamic lot-progress control system; effective process condition editing; process flow; process recipe; process steps; trial lots; wafer specifications; Computer integrated manufacturing; Control systems; Extraterrestrial measurements; Load forecasting; Process control; Research and development; Semiconductor devices; Size control; Time measurement; Ultra large scale integration;
Conference_Titel :
Semiconductor Manufacturing, 2000. Proceedings of ISSM 2000. The Ninth International Symposium on
Print_ISBN :
0-7803-7392-8
DOI :
10.1109/ISSM.2000.993687
