DocumentCode :
2387701
Title :
Device Performance Evaluation of PMOS Devices Fabricated by B2H6PIII/PLAD Process on Poly-Si Gate Doping
Author :
Qin, Shu ; McTeer, Allen
Author_Institution :
Micron Technol. Inc., Boise, ID
fYear :
0
fDate :
0-0 0
Firstpage :
68
Lastpage :
72
Abstract :
It has been shown that the PIII/PLAD poly-Si gate doping process offers unique advantages over conventional beam line systems, including system simplification, lower cost, higher throughput, and device performance equivalence or improvement. PMOS devices fabricated by a B 2H6/H2 PIII/PLAD process on P+ poly-gate doping are intensively evaluated in this paper. In addition to higher throughput, PMOS devices fabricated by a PLAD process showed an equivalent electrical performance to those fabricated by conventional beam line ion implantation, including similar poly-Si gate resistance and depletion, threshold and sub-threshold characteristics, drive current, and gate-oxide integrity
Keywords :
MOSFET; plasma immersion ion implantation; semiconductor doping; B2H6 PIII/PLAD process; B2H6 plasma immersion ion implantation/plasma doping process; P+ poly-gate doping; PMOS devices; Si:B; beam line systems; device performance evaluation; drive current; gate-oxide integrity; ion implantation; poly-Si gate depletion; poly-Si gate doping; poly-Si gate resistance; subthreshold characteristics; threshold characteristics; Doping; Hydrogen; Implants; Ion beams; Ion implantation; MOS devices; Plasma applications; Plasma devices; Plasma immersion ion implantation; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Junction Technology, 2006. IWJT '06. International Workshop on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0047-3
Type :
conf
DOI :
10.1109/IWJT.2006.220863
Filename :
1669450
Link To Document :
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