DocumentCode
2388265
Title
High performance Ge pMOS devices using a Si-compatible process flow
Author
Zimmerman, P. ; Nicholas, G. ; Jaeger, B. De ; Kaczer, B. ; Stesmans, A. ; Ragnarsson, L. Å ; Brunco, D.P. ; Leys, F.E. ; Caymax, M. ; Winderickx, G. ; Opsomer, K. ; Meuris, M. ; Heyns, M.M.
Author_Institution
IMEC, Leuven
fYear
2006
fDate
11-13 Dec. 2006
Firstpage
1
Lastpage
4
Abstract
Ge pMOS mobilities up to 358 cm2/Vs are demonstrated using a Si-compatible process flow without the incorporation of strain. EOT is approximately 12 Aring with a gate leakage less than 0.01 A/cm 2 at Vt+ 0.6 V. Ge transistors are characterized with gate lengths ranging from 10 mum down to 0.125 mum, the shortest ever reported. We also present the best Ge pMOS drain current to date of 790 muA/mum at Vgt = Vd = -1.5V for an Lg of 0.19 mum
Keywords
MOSFET; elemental semiconductors; germanium; silicon; -1.5 V; 0.125 to 10 micron; Ge; Ge pMOS devices; Ge pMOS drain current; Ge transistors; Si; Si-compatible process flow; gate leakage; Annealing; Capacitive sensors; Dielectric substrates; Dry etching; Gate leakage; Hafnium oxide; Implants; MOS devices; Passivation; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location
San Francisco, CA
Print_ISBN
1-4244-0439-8
Electronic_ISBN
1-4244-0439-8
Type
conf
DOI
10.1109/IEDM.2006.346870
Filename
4154289
Link To Document