DocumentCode
2388572
Title
USJ technology solutions by stretching the limits of a lamp-based RTP system
Author
Boas, Ryan ; Balasubramanian, Ramachandran ; Pham, Gia ; Ramamurthy, Senthil
Author_Institution
Transistor Capacitor Group, Appl. Mater. Inc., Santa Clara, CA, USA
fYear
2001
fDate
29-30 Nov. 2001
Firstpage
63
Lastpage
66
Abstract
Traditionally lamp-based RTP systems have been part of the limitations in meeting all the requirements for sub-100 nm device geometries. In this paper we present some data that shows the possibility of extending the capabilities of a production-proven technology to meet advanced performance targets through hardware, process and controller optimization.
Keywords
rapid thermal processing; semiconductor junctions; 100 nm; lamp-based RTP system; ultra-shallow junction technology; Annealing; Boron; Capacitors; Electrical resistance measurement; Geometry; Hardware; Implants; Optimized production technology; Process control; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Junction Technology, 2001. IWJT. Extended Abstracts of the Second International Workshop on
Conference_Location
Tokyo, Japan
Print_ISBN
4-89114-019-4
Type
conf
DOI
10.1109/IWJT.2001.993827
Filename
993827
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