Electrical characterization of anomalous cells in phase change memory arrays

In order to integrate phase change memory (PCM) devices into large and yielding arrays, a programming window between the two memory logic states must exist with a probability of error less than 10^-9 (1 PPB). Understanding and removing the mechanisms of cell failure during the programming operation is therefore required for this technology to be viable. This paper discusses new methodologies for PCM failure electrical characterization, discovers two potential failure mechanisms and proposes new approaches for improvements