DocumentCode
2389224
Title
Nonvolatile SRAM Cell
Author
Wang, Wei ; Gibby, Aaron ; Wang, Zheng ; Chen, Tze Wee ; Fujita, Shinobu ; Griffin, Peter ; Nishi, Yoshio ; Wong, Simon
Author_Institution
Center for Integrated Syst., Stanford Univ., CA
fYear
2006
fDate
11-13 Dec. 2006
Firstpage
1
Lastpage
4
Abstract
A nonvolatile SRAM cell with two back-up nonvolatile memory devices is proposed. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty. A slight performance penalty is anticipated
Keywords
SRAM chips; nonvolatile SRAM cell; nonvolatile memory devices; nonvolatile storage; Electrodes; Laboratories; Leakage current; Logic devices; MOSFETs; Nonvolatile memory; Radio frequency; Random access memory; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location
San Francisco, CA
Print_ISBN
1-4244-0439-8
Electronic_ISBN
1-4244-0439-8
Type
conf
DOI
10.1109/IEDM.2006.346730
Filename
4154331
Link To Document