A shared-buffer direct-access (SBDA) switch architecture for ATM-based networks

With the increase in the line speed and the switching functions, the switching efficiency of a shared buffer ATM switch becomes limited mainly due to the various memory operations involved with the packet switching. A shared buffer direct access (SBDA) ATM switch architecture capable of enhancing the switching efficiency at the hardware level of a typical shared buffer ATM switch by parallelizing the memory operations has been used to study its comparative performance under unicast and multicast traffic. The SBDA switch, like any other shared buffer ATM switch shows an optimal performance under unicast traffic. In the paper, the performance evaluation by computer simulation is conducted primarily to study the effect of directly input bursty multicast traffic on a generic shared buffer based ATM switch which includes the proposed SBDA switch. The computer simulation shows that the performance of a shared buffer ATM switch degrades considerably under the effect of directly input bursty multicast traffic as compared to its optimal performance under bursty unicast traffic. The present study prompts a further probing of shared buffer ATM switch architecture capable of alleviating the performance degradation due to direct multicasting