Title :
Variable 2K/4K/8K-point FFT/IFFT with compact memory for OFDM-based DVB-T system
Author :
Choi, Jun Rim ; Kim, Hui Gon ; Han, Seung Soo ; Hwang, Sun Cheol
Author_Institution :
Sch. of Electron. Eng., Kyungpook Nat. Univ., Daegu, South Korea
Abstract :
We Propose a 2K/4K/8K point FFT (Fast Fourier Transform) for OFDM (Orthogonal Frequency Division Multiplexing) of DVB-H (Digital Video Broadcast Terrestrial) Receiver. The proposed FFT architecture utilizes cascaded radix-4 single path feedback (SDF) structure based on the Radix-2/Radix-4 FFT algorithm.[11] We use block floating point scaling technique in order to increase SQNR. The 2K/8K FFT consists of 5 cascaded stages of radix-4 and 3 stages of radix-2 butterfly units. The SQNR of 58dB is achieved with 10-bit data input, 14-bit internal data and twiddle factors, and 18-bit data output. The core has 75,804 gates with 204,672 bits of RAM and 33,572 bits of ROM using 0.18um CMOS technology.
Keywords :
CMOS integrated circuits; OFDM modulation; digital video broadcasting; fast Fourier transforms; random-access storage; read-only storage; CMOS technology; DVB-H; FFT architecture; OFDM-based DVB-T system; RAM; ROM; SQNR; block floating point scaling technique; cascaded radix-4 single path feedback structure; compact memory; digital video broadcast terrestrial receiver; fast Fourier transform; gate; orthogonal frequency division multiplexing; radix-2 FFT algorithm; radix-2 butterfly unit; radix-4 FFT algorithm; size 0.18 mum; word length 10 bit; word length 14 bit; word length 18 bit; Computer architecture; Delay; Digital video broadcasting; Educational institutions; Hardware; OFDM; Receivers; Block Floating Point; Digital Video Broadcast Terrestrial; Orthogonal Frequency Division Modulation; Single Delay Feedback;
Conference_Titel :
Systems and Informatics (ICSAI), 2012 International Conference on
Conference_Location :
Yantai
Print_ISBN :
978-1-4673-0198-5
DOI :
10.1109/ICSAI.2012.6223173
