DocumentCode
2390286
Title
1T-DRAM at the 22nm technology node and beyond: An alternative to DRAM with high-k storage capacitor
Author
Bawedin, M. ; Cristoloveanu, S. ; Hubert, A. ; Guegan, G. ; Chang, S.J. ; Sagnes, B. ; Martinez, F. ; Pascal, F. ; Valenza, M. ; Hoffmann, A.
Author_Institution
IES, Univ. of Montpellier II, Montpellier, France
fYear
2011
fDate
28-31 Aug. 2011
Firstpage
93
Lastpage
94
Abstract
In this work, the authors demonstrate that the meta-stable DRAM (MSDRAM) can achieve better performances regarding to the sensing margin compared to programming methods like impact ionization and forward biased junctions. This improvement results mainly from the low current level at 0-state. Indeed, the MSDRAM uses gate capacitive coupling method which allows to reach zero current level. Finally, the band-to-band tunneling used to program the 1-state strongly reduces the power consumption and improves the device reliability. These promising results promote the meta-stable dip (MSD) programming mechanism as a viable solution for low power single-transistor DRAM memories.
Keywords
DRAM chips; impact ionisation; programming; 1T-DRAM; MSD programming; MSDRAM; band-to-band tunneling; forward biased junction; gate capacitive coupling method; impact ionization; metastable DRAM; metastable dip; single transistor DRAM memory; size 22 nm; zero current level; Logic gates; Rain; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrets (ISE), 2011 14th International Symposium on
Conference_Location
Montpellier
ISSN
2153-3253
Print_ISBN
978-1-4577-1023-0
Type
conf
DOI
10.1109/ISE.2011.6084998
Filename
6084998
Link To Document