DocumentCode
2390484
Title
Multi-level p+ tri-gate SONOS NAND string arrays
Author
Friederich, C. ; Specht, M. ; Lutz, T. ; Hofinann, F. ; Dreeskornfeld, L. ; Weber, W. ; Kretz, J. ; Melde, T. ; Rösner, W. ; Landgraf, E. ; Hartwich, J. ; Städele, M. ; Risch, L. ; Richter, D.
Author_Institution
Qimonda Flash GmbH, Munich
fYear
2006
fDate
11-13 Dec. 2006
Firstpage
1
Lastpage
4
Abstract
Tri-gate silicon-oxide-nitride-oxide-silicon (SONOS) NAND string arrays with p+ gate for multi-level high density data flash applications have been fabricated down to 50 nm gate length for the first time. Thick nitride and top oxide layers have been chosen to achieve large threshold voltage shifts of DeltaVth = 6 V at NAND flash compatible times and voltages. In spite of the thick dielectric stack device scalability is not compromised, as shown by simulation for 30 nm gate length. In addition, excellent program inhibit and retention properties as well as tight multi-level threshold voltage distributions have been found
Keywords
NAND circuits; flash memories; silicon; 30 nm; 6 V; NAND flash; SONOS; multi level; p+ tri gate; silicon oxide nitride oxide silicon; string arrays; Dry etching; Electron traps; FinFETs; Fluctuations; Lithography; Nonvolatile memory; Pulse measurements; Resists; SONOS devices; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location
San Francisco, CA
Print_ISBN
1-4244-0438-X
Electronic_ISBN
1-4244-0439-8
Type
conf
DOI
10.1109/IEDM.2006.346946
Filename
4154381
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