An optimal implementation of a superscalar architecture

This paper describes an ongoing research effort at the High Density Electronics Center (HiDEC) and the University of Arkansas for developing optimal system designs based on Multichip Module (MCM) technology. This research effort is focused on developing a high performance superscalar processor architecture designed for use in an MIMD parallel architecture. The architectural tradeoffs performed for developing the superscalar architecture are discussed, including the partitioning of functionality in order to take advantage of the high density, high bandwidth I/O capabilities of MCMs. Results of an analysis study are also presented, showing the performance increase of the optimal MCM based design compared to a traditionally packaged RISC architecture