• DocumentCode
    2391239
  • Title

    Design of a direct digital synthesizer with an on-chip D/A-converter

  • Author

    Vankka, Jouko ; Waltari, Mikko ; Kosunen, Marko ; Halonen, Kari

  • Author_Institution
    Lab. of Signal Process. & Comput. Technol., Helsinki Univ. of Technol., Espoo, Finland
  • Volume
    1
  • fYear
    1997
  • fDate
    9-12 Jun 1997
  • Firstpage
    21
  • Abstract
    A 140 MHz Direct Digital Synthesizer (DDS) with an on-chip D/A-converter is designed and processed in 0.8 μm BiCMOS. The on-chip D/A-converter avoids delays and line loading caused by interchip connections. The frequency resolution of the DDS is 0.0326 Hz with a corresponding frequency switching speed of 150 ns. The digital parts of the chip are implemented with CMOS design in order to reduce power consumption. The D/A-converter is designed with BiCMOS technology to achieve 10 bit accuracy at a clock rate of 140 MHz. The chip has a complexity of 19,100 transistors with a die area of 12.2 mm2. The simulated power dissipation is 0.58 W at 140 MHz
  • Keywords
    BiCMOS digital integrated circuits; circuit analysis computing; clocks; digital-analogue conversion; direct digital synthesis; integrated circuit design; 0.58 W; 0.8 micron; 140 MHz; 150 ns; BiCMOS; CMOS design; chip complexity; clock rate; die area; direct digital synthesizer; frequency resolution; frequency switching speed; on-chip D/A-converter; power consumption; simulated power dissipation; BiCMOS integrated circuits; Circuit synthesis; Clocks; Digital signal processing; Filters; Frequency; Laboratories; Read only memory; Synthesizers; Table lookup;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
  • Print_ISBN
    0-7803-3583-X
  • Type

    conf

  • DOI
    10.1109/ISCAS.1997.608504
  • Filename
    608504