• DocumentCode
    2391374
  • Title

    Package Design Advisor-mechanical, electrical and thermal analysis in one CAD tool

  • Author

    Choksi, G. ; Immaneni, L. ; Karunakaran, R. ; Lin, Y.C. ; Stys, D. ; Wyllie, M.

  • Author_Institution
    Assembly Technol. Dev., Intel Corp., Chandler, AZ, USA
  • fYear
    1995
  • fDate
    21-24 May 1995
  • Firstpage
    618
  • Lastpage
    620
  • Abstract
    This paper describes a tool called the Package Design Advisor was developed to allow designers of silicon devices to make packaging decisions as part of their product design flow and model the impact of die design on package and vice versa. The tool runs under the X-Windows Motif environment and is completely interactive, with the user requiring to input no detailed geometry data, but chip specifications such as die size, estimated power, number of I/O´s, etc. The major modules are: electrical, mechanical and thermal analysis; electrical model generation, package specs and pad layout guidelines. The mechanical module selects and checks for minimum and maximum die sizes allowable for the different families and other criteria required for assembly. The thermal module computes Θja and Θjc and allows the user to configure a cooling system for the package for a specific application (heat fin size, air flow rate, etc.). The electrical analysis module computes the number of power and ground pins required for the core and periphery based on buffer and bus characteristics input by the user, and the electrical model section generates schematics of the package and user specified transmission line models (microstrip, stripline, etc.) to be used in circuit simulation
  • Keywords
    CAD; electronic engineering computing; packaging; CAD tool; Package Design Advisor; X-Windows Motif; circuit simulation; cooling; die design; electrical analysis; mechanical analysis; packaging; pad layout; product design flow; silicon devices; thermal analysis; transmission line models; Assembly; Circuit analysis computing; Cooling; Geometry; Guidelines; Packaging; Pins; Power system modeling; Product design; Silicon devices;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 1995. Proceedings., 45th
  • Conference_Location
    Las Vegas, NV
  • Print_ISBN
    0-7803-2736-5
  • Type

    conf

  • DOI
    10.1109/ECTC.1995.515347
  • Filename
    515347