Design of a parallel photonic FFT processor

Author

Rozier, Richard G. ; Kiamilev, Fouad E. ; Krishnamoorthy, Ashok V.

Author_Institution

North Carolina Univ., Charlotte, NC, USA

fYear

1996

fDate

27-29 Oct 1996

Firstpage

36

Lastpage

43

Abstract

We present the design of a parallel high-performance chipset for computing 1-D complex fast Fourier transforms (FFTs). The chipset is composed of two chips-a photonic FFT processing engine (PFFT) and a photonic data storage element (PRAM). Using this chipset, a number of high-speed systems can be created. The chipset is compatible with a number of available interconnect technologies, such as free-space optical interconnection schemes involving the flip-chip integration of submicron CMOS ICs with GaAs chips containing 2-D arrays of multiple quantum well diode optical receivers and transmitters

Keywords

CMOS integrated circuits; digital signal processing chips; fast Fourier transforms; integrated optoelectronics; optical computing; optical interconnections; optical receivers; optical transmitters; parallel architectures; quantum well lasers; random-access storage; 1D complex fast Fourier transform computing; GaAs; PRAM; flip-chip integration; free-space optical interconnection schemes; high-speed systems; interconnect technologies; multiple quantum well diode optical receiver arrays; optical computer; parallel high-performance chipset; parallel photonic FFT processor design; photonic FFT processing engine; photonic data storage element; submicron CMOS ICs; CMOS technology; Concurrent computing; Diodes; Engines; Fast Fourier transforms; Flexible printed circuits; Gallium arsenide; Optical arrays; Optical interconnections; Phase change random access memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Massively Parallel Processing Using Optical Interconnections, 1996., Proceedings of the Third International Conference on

Conference_Location

Maui, HI

Print_ISBN

0-8186-7591-8

Type

conf

DOI

10.1109/MPPOI.1996.559034

Filename

559034