Design Method for Duffing System Based on DSP Builder

Author

Shi, Te ; Rui, Guosheng ; Zhang, Yang ; Zhang, Song

Author_Institution

Grad. Students´´ Brigade, Naval Aeronaut. & Astronaut. Univ., Yantai, China

fYear

2012

fDate

19-20 May 2012

Firstpage

121

Lastpage

124

Abstract

DSP Builder is a design tool in algorithms level, which makes the algorithms realized on FPGA rapid and convenient. In this paper, by the related research on Duffing system, a digital circuit based on DSP Builder is proposed, which solves the problem that the chaotic system of analog circuit system is vulnerable to external conditions. In order to realize the digital circuit based on DSP Builder, an improved Euler algorithm is proposed. Then the circuit can be translated into the VHDL code and downloaded into FPGA.

Keywords

differential equations; digital signal processing chips; field programmable gate arrays; hardware description languages; logic design; DSP builder; Euler algorithm; FPGA; VHDL code; analog circuit system; chaotic system; design method; design tool; differential equation; digital circuit; duffing system; external conditions; Analog circuits; Application software; Chaos; Digital circuits; Digital signal processing; Equations; Field programmable gate arrays; DSP Builder; Duffing system; FPGA; the Euler algorithm;

fLanguage

English

Publisher

ieee

Conference_Titel

Systems and Informatics (ICSAI), 2012 International Conference on

Conference_Location

Yantai

Print_ISBN

978-1-4673-0198-5

Type

conf

DOI

10.1109/ICSAI.2012.6223258

Filename

6223258