DocumentCode
2391928
Title
10 GBPS over copper lines - state of the art in VLSI
Author
Bates, Stephen ; Iniewski, Kris
Author_Institution
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta., Canada
fYear
2005
fDate
20-24 July 2005
Firstpage
491
Lastpage
494
Abstract
This paper outlines some of the problems that VLSI designers are solving and provides some estimates on feasibility of future CMOS devices. We outline some of the challenges for 10GBASE-T and present some of the performance figures that a 10GBASE-T PHY have to meet.
Keywords
CMOS integrated circuits; IEEE standards; VLSI; data communication; integrated circuit design; local area networks; 10 Gbit/s; 10GBASE-T PHY; 10GBASE-X; CMOS device; VLSI design; copper line; data communication; Copper; Encoding; Ethernet networks; Optical fiber cables; Optical fiber devices; Optical fibers; Physical layer; SONET; Standards development; Very large scale integration; 10GBASE-T; 10GBASE-X; Data Communications; LDPC;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on
Print_ISBN
0-7695-2403-6
Type
conf
DOI
10.1109/IWSOC.2005.1
Filename
1530996
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