DocumentCode :
2392103
Title :
Architecture for multi-processor SoC platform using dedicated channels
Author :
Lee, Gyongsu ; Park, Sin-Chong
Author_Institution :
Inf. & Commun. Univ., Daejeon, South Korea
fYear :
2005
fDate :
20-24 July 2005
Firstpage :
525
Lastpage :
529
Abstract :
A multi-processor architecture for the platform based SoC design is proposed. Dedicated FIFOs are selected as channels between processors for designing of wireless communication system. The conditions to meet the latency and the throughput requirements are also proposed with generalized equations. To demonstrate the suggested equations, an 802.11a system is analyzed. They are confirmed by simulation of SystemC transaction level modeling.
Keywords :
integrated circuit design; multiprocessing systems; system-on-chip; 802.11a system; SystemC transaction level modeling; dedicated channels; multiprocessor architecture; system-on-chip design; wireless communication system; Clocks; Computer architecture; Delay; Design methodology; Equations; Frequency; Hardware; Process design; Throughput; Wireless communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on
Print_ISBN :
0-7695-2403-6
Type :
conf
DOI :
10.1109/IWSOC.2005.43
Filename :
1531004
Link To Document :
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