Low power 120 KSPS 12bit SAR ADC with a novel switch control method for internal CDAC

A low power 1.3V 12bit successive approximation register analog-to-digital converter (SAR ADC) is presented for MEMS and biomedical applications. In the DAC of this ADC, a new switch control technique has been proposed to make the ADC more energy as well as area efficient. Besides, a very high resolution, low offset CMOS comparator is designed for the satisfactory operation of the ADC. The complete ADC has been implemented using UMC 0.18μm RF/CMOS process with 1.8V supply voltage and 1.3V reference voltage for the DAC. Its performance has been verified by spectre simulation. The ADC achieved a sampling rate of 120KSPS and a power consumption of 3mW at 1.8V supply voltage. Its DNL and INL are 0.68LSB and 0.7LSB respectively.