• DocumentCode
    2392832
  • Title

    SysPar: a software package for systolising and parallelising nested loop algorithms

  • Author

    Xue, Jingling

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ, Singapore
  • fYear
    1994
  • fDate
    22-26 Aug 1994
  • Firstpage
    551
  • Abstract
    Systolic array design consists in the distribution of iterations to both space and time in such a way that the distribution specifies a systolic array. Parallelising compilation consists in the identification of loops whose different iterations may run simultaneously on different processors, either independently or in an overlapped fashion. Both use various matrix transformations such as loop interchange and reversal to detect and exploit parallelism in nested loop algorithms. The paper describes a software package called SysPar for systolising and parallelising nested loop algorithms by unifying these various transformations as nonsingular (unimodular or nonunimodular) transformations
  • Keywords
    parallel algorithms; parallel programming; program compilers; systolic arrays; SysPar; loop interchange; matrix transformations; nested loop algorithms; parallelising compilation; software package; systolic array design; Algorithm design and analysis; Design methodology; Oils; Packaging; Process design; Rails; Software algorithms; Software packages; Space technology; Systolic arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    TENCON '94. IEEE Region 10's Ninth Annual International Conference. Theme: Frontiers of Computer Technology. Proceedings of 1994
  • Print_ISBN
    0-7803-1862-5
  • Type

    conf

  • DOI
    10.1109/TENCON.1994.369239
  • Filename
    369239