ATPG-based preimage computation: efficient search space pruning with ZBDD

Computing image/preimage is a fundamental step in formal verification of hardware systems. Conventional OBDD-based methods for formal verification suffer from spatial explosion, since OBDDs can grow exponentially in large designs. On the other hand, SAT/ATPG based methods are less demanding on memory. But the run-time can be huge for these methods, since they must explore an exponential search space. In order to reduce this temporal explosion of SAT/ATPG based methods, efficient learning techniques are needed. In this paper, we present a new ZBDD based method to compactly store and efficiently search previously explored search-states for ´ATPG-based preimage computation´. We learn front these search-states and avoid searching their subsets or supersets. Both,solution and conflict subspaces are pruned based on simple set operations using ZBDDs. We integrate our techniques into an ATPG engine and demonstrate their efficiency on ISCAS ´89 benchmark circuits. Experimental results show that significant search-space pruning for preimage computation is achieved, compared to previous methods.