Efficient and flexible simulation of phase locked loops, part I: Simulator design

Although phase-locked loops (PLLs) are arguably the most ubiquitous control loop designed by humans, system theory analysis seems to lag behind the practice of implementation. In particular, full simulation of PLLs is rare. This paper will explain the reasons for this and offer an efficient and flexible simulator for PLLs. This part presents the simulator requirements and design. Part II presents post processing methods and shows a design example.