Title :
CMOS winner-take-all circuits: a detailed comparison
Author :
Günay, Z. Sezgin ; Sánchez-Sinencio, Edgar
Author_Institution :
Texas A&M Univ., USA
Abstract :
Winner-Take-All (WTA) structures are widely used in hardware implementations of neural networks and dedicated fuzzy processors where highly parallelized computations are involved. In this paper, a comparison of previously reported WTA structures is presented. Five structures are simulated and fabricated in a standard 2.0 μm n-well double-poly double-metal CMOS process
Keywords :
CMOS logic circuits; fuzzy neural nets; logic gates; neural chips; 2.0 micron; CMOS winner-take-all circuits; WTA structures; dedicated fuzzy processors; hardware implementations; highly parallelized computations; n-well double-poly double-metal CMOS process; neural networks; CMOS process; Circuit testing; Computational modeling; Computer networks; Concurrent computing; Fuzzy neural networks; Mirrors; Neural network hardware; Neural networks; Switches;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.608514
