Plenary speaker

Summary form only given. Multi-threaded architectures exploit explicit parallelism to extract more throughput from a single processor. Embedded SoC designs can exploit this for greater area-efficiency, or for better real-time responsiveness. In this session, we will describe multi-threading. We will offer and example of a microprocessor that implements both multiprocessing and multi-threading (MIPS32 1004K) and also share benchmarking results that demonstrate the advantages in performance, power and efficiency of a system that utilizes a combination of multiprocessing and multi-threading versus a similar system that utilizes only multiprocessing.