• DocumentCode
    2393723
  • Title

    “Introduction to SoC testing”

  • Author

    Wang, Laung-Terng

  • Author_Institution
    Syn Test Technol., Inc., Sunnyvale, CA, USA
  • fYear
    2011
  • fDate
    26-28 Sept. 2011
  • Firstpage
    256
  • Lastpage
    257
  • Abstract
    Continued advances in manufacturing technology have enabled an SoC design to contain billions of transistors. The increase of circuit complexity has imposed serious challenges on product quality, test cost, and system reliability. In this talk, I will give a brief introduction to SoC testing of digital circuits. Test techniques that have been practiced in industry to improve product quality and test cost are first described. A few emerging techniques to further reduce product development time and increase system reliability are then discussed.
  • Keywords
    design for testability; integrated circuit reliability; system-on-chip; circuit complexity; product quality; system reliability; system-on-chip design; system-on-chip testing; test cost; Reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference (SOCC), 2011 IEEE International
  • Conference_Location
    Taipei
  • ISSN
    2164-1676
  • Print_ISBN
    978-1-4577-1616-4
  • Electronic_ISBN
    2164-1676
  • Type

    conf

  • DOI
    10.1109/SOCC.2011.6085153
  • Filename
    6085153