On the use of simulation in support of capital utilization

This paper provides a modeling approach for dealing with the challenging question of trade-off between capital utilization and production efficiency in semiconductor manufacturing where the ultimate goal is of maximum output at maximum velocity and minimum cost. Full fab simulation is used iteratively between models of “horizontal” and “vertical” simulations in order to rapidly generate results for different possible states of the fab with varying capital costs, matched cycle time (CT), and fixed throughput rate, so as to determine the most efficient operating condition for the fab with respect to cost, CT, and output.