DocumentCode :
2394597
Title :
A novel SCR ESD protection structure with low-loading and latchup immunity for high-speed I/O pad
Author :
Lai, Chen-Shang ; Liu, Meng-Hwang ; Su, Shin ; Lu, Tao-Cheng
Author_Institution :
Special Device Modeling Dept., Silicon Lab, Hsin-chu, Taiwan
fYear :
2003
fDate :
6-8 Oct. 2003
Firstpage :
80
Lastpage :
83
Abstract :
A novel SCR device "Latchup-free gate-couple LVTPSCR (LFGCPSCR)" has been proposed to act as an efficient ESD protection device with low loading effect. With the proper control circuit, the trigger voltage under normal operation can be high up to 14V, providing excellent immunity to Latchup. Under ESD events, this novel SCR device could trigger fast and provide an effective discharging path for ESD.
Keywords :
electrostatic discharge; equivalent circuits; thyristors; trigger circuits; 14 V; SCR ESD protection structure; control circuit; discharging; high-speed I/O pad; latchup immunity; latchup-free gate-couple SCR; loading effect; trigger voltage; Atherosclerosis; Driver circuits; Electrostatic discharge; Fingers; MOS devices; Parasitic capacitance; Protection; Robustness; Thyristors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 2003 International Symposium on
ISSN :
1524-766X
Print_ISBN :
0-7803-7765-6
Type :
conf
DOI :
10.1109/VTSA.2003.1252557
Filename :
1252557
Link To Document :
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