Title :
A CMOS low noise amplifier for 5 to 6 GHz wireless applications
Author :
Subramanian, Viswanathan ; Spiegel, Solon ; Eickhoff, Ralf ; Boeck, Georg
Author_Institution :
Berlin Univ. of Technol., Berlin
fDate :
Oct. 29 2007-Nov. 1 2007
Abstract :
This work demonstrates the design of a wideband low noise amplifier in 0.13 um CMOS technology. Important design aspects and the influence of bandwidth improving circuit elements on various LNA performance parameters like gain, matching, noise figure, and stability are analyzed. Simulated and measured LNA results are presented. At the centre frequency of 5.5 GHz the measured LNA performance includes 13.5 dB gain, 3.9 dB noise figure, -9.5 dB and -13.5 dB of input and output return loss, and 1 dB gain compression point at - 8.5 dBm input power respectively. From 5 GHz to 6 GHz a gain drop of less than 1 dB and an average noise figure of 4 dB have been measured. Input referred 1 dB gain compression point better than -8.5 dBm is measured over the entire bandwidth. The LNA dissipates 14 mW from a 1.8 V power supply. Active chip area is 0.28 mm2.
Keywords :
CMOS integrated circuits; MMIC amplifiers; low noise amplifiers; radiocommunication; wideband amplifiers; CMOS low noise amplifier; LNA; frequency 5 GHz to 6 GHz; gain 13.5 dB; gain compression point; noise figure 3.9 dB; noise figure 4 dB; power 14 mW; size 0.13 mum; voltage 1.8 V; wideband low noise amplifier; wireless applications; Bandwidth; Broadband amplifiers; CMOS technology; Circuit noise; Gain measurement; Low-noise amplifiers; Noise figure; Noise measurement; Performance gain; Semiconductor device measurement; CMOS; bandwidth enhancement; inductive shunt peaking; low noise; stability; wideband;
Conference_Titel :
Microwave and Optoelectronics Conference, 2007. IMOC 2007. SBMO/IEEE MTT-S International
Conference_Location :
Brazil
Print_ISBN :
978-1-4244-0661-6
Electronic_ISBN :
978-1-4244-0661-6
DOI :
10.1109/IMOC.2007.4404374