• DocumentCode
    2396200
  • Title

    Energy Efficient Spatial Coding Technique for Low Power VLSI Applications

  • Author

    Ravindra, J.V.R. ; Chittarvu, Navya ; Srinivas, M.B.

  • Author_Institution
    Center for VLSI & Embedded Syst. Technol., Int. Inst. of Inf. Technol., Andhra Pradesh
  • fYear
    2006
  • fDate
    Dec. 2006
  • Firstpage
    201
  • Lastpage
    204
  • Abstract
    In deep-submicron technology (DSM), minimizing the propagation delay and power dissipation on buses is the most important design objective in system-on-chip (SOC) design. In particular, the coupling effects between wires on the bus that can cause serious problems such as cross-talk delay, noise and power dissipation. Most of the researchers have concentrated either on minimizing the power dissipation or minimizing crosstalk delay. In this paper, the authors propose a technique for energy efficient data transmission for on-chip buses and evaluate the effectiveness of our technique by using SPEC 95 benchmarks suit. The authors show that our technique achieves 35% of energy savings over the un-encoded data transmission on the data bus
  • Keywords
    VLSI; coupled circuits; data communication equipment; integrated circuit design; system-on-chip; coupling effects; data transmission; deep-submicron technology; low power VLSI; power dissipation; propagation delay; spatial coding; system-on-chip design; Couplings; Crosstalk; Data communication; Delay effects; Energy efficiency; Power dissipation; Propagation delay; System-on-a-chip; Very large scale integration; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip for Real-Time Applications, The 6th International Workshop on
  • Conference_Location
    Cairo
  • Print_ISBN
    1-4244-0898-9
  • Type

    conf

  • DOI
    10.1109/IWSOC.2006.348236
  • Filename
    4155289