Title :
The WASP-3 monolithic-WSI massively parallel processor
Author :
Jalowiecki, Ian ; Dearman, H. ; Hedge, Steve ; Bazazan-Noghani, Waheed
Author_Institution :
Aspex Microsyst., Brunel Univ., Uxbridge, UK
Abstract :
The paper is a progress report on the WASP development programme. It reports on the successful conclusion of a wafer-scale hybridisation experiment, designed as `proof-of-principle´ of the wafer stacking procedure used in the mating of WASP-3 wafers and their HDI (High Density Interconnect) layer. WASPS wafers have completed manufacture and are now undergoing final assembly prior to commencing test. The paper reviews the WASP configurable high-level interconnection strategies and gives a thorough review of the corresponding test and reconfiguration strategies
Keywords :
boundary scan testing; computer testing; integrated circuit interconnections; integrated circuit testing; microassembling; network routing; packaging; parallel machines; wafer-scale integration; WASP development programme; WASP-3; configurable high-level interconnection strategies; high density interconnect layer; massively parallel processor; monolithic-WSI processor; reconfiguration strategies; test strategies; wafer stacking procedure; wafer-scale hybridisation experiment; Application specific processors; Assembly; Chromium; Manufacturing; Mirrors; Routing; Stacking; Testing; Wafer bonding; Wiring;
Conference_Titel :
Wafer Scale Integration, 1995. Proceedings., Seventh Annual IEEE International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-2467-6
DOI :
10.1109/ICWSI.1995.515435
