Final experimental results of three-level boost rectifier based on 3SSC with FPGA digital control for UPS applications

This paper presents the final experimental results obtained from a 3kW lab model developed three-state switching cell (3SSC) single-phase three-level boost rectifier with Power Factor Correction (PFC) using FPGA digital control for UPS applications. Its main features are: reduced conduction losses, weight and volume; simple digital control strategy based on One-Cycle Control (OCC) technique using FPGA; connection between input and output enabling the use of inverter and bypass for UPS application. A simple theoretical analysis and simulation results are also presented.