Harmonic reduction in single-phase inverter using a parallel operation technique

A technique is presented for harmonic reduction in inverters using sinusoidal pulse-width modulation (PWM). A modified circuit based on parallel operation of MOS-based inverter sets using interphase reactors as harmonic reducing elements and making use of a specific phase shift between the modulating and carrier waveforms is investigated as a means to economically and efficiently reduce the harmonic contents in the output waveform. The output waveform of a single-phase PWM inverter is investigated both theoretically and experimentally. Detailed analysis shows that the harmonics lower than the 15th are all less than 1% of the fundamental component when the frequency ratio is relatively low, i.e. about nine and similarly for the 29th harmonic when the ratio is about 15. This is done without noticeable reduction in the fundamental component. The results show the feasibility of obtaining practically sinusoidal output waveforms