DocumentCode
2397572
Title
Technology scaling issues of an iddq built-in current sensor
Author
Xue, Bin ; Walker, D.M.H.
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX
fYear
2005
fDate
1-1 May 2005
Firstpage
10
Lastpage
15
Abstract
Analysis and comparison of 1.5 mum and 350 nm CMOS test chip results of a built-in current sensor design reveal several critical design issues. This paper includes a discussion of these issues. The success of the sensor design hinges on how these issues are addressed in order to achieve successful operation during technology scaling
Keywords
CMOS integrated circuits; electric sensing devices; 1.5 micron; 350 nm; CMOS test chip; IDDQ built-in current sensor; quiescent current testing; sensor design; technology scaling; CMOS technology; Calibration; Counting circuits; Flip-flops; Semiconductor device measurement; Signal resolution; Signal to noise ratio; Stochastic resonance; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Current and Defect Based Testing, 2005. DBT 2005. Proceedings. 2005 IEEE International Workshop on
Conference_Location
Palm Springs, CA
Print_ISBN
1-4244-0034-1
Type
conf
DOI
10.1109/DBT.2005.1531295
Filename
1531295
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