Title :
Fault Coverage Improving for SoC Based on IEEE1500 SECT standard
Author :
Elvira, Kulak ; Maryna, Kaminska ; Olesia, Guz ; Alexander, Parfentiy
Author_Institution :
Dept. of Design Autom., Kharkiv Nat. Univ. of Radio Electron., Kharkiv
fDate :
Feb. 28 2006-March 4 2006
Abstract :
It is proposed strategy of bottlenecks choice in digital device and procedure of modification for test quality improving based on methods of testability analysis and IEEE Computer Society standards.
Keywords :
automatic test pattern generation; fault simulation; system-on-chip; IEEE 1500 SECT standard; SoC; asynchronous circuits; deterministic ATPG; digital device; fault coverage; test quality; testability analysis; Circuit faults; Circuit testing; Computer Society; Design automation; Digital circuits; Digital integrated circuits; Graphics; Integrated circuit testing; Process design; Semiconductor device measurement; Controllability; IEEE Computer Society Standards; Observability; Testability; asynchronous circuits; deterministic ATPG; fault coverage;
Conference_Titel :
Modern Problems of Radio Engineering, Telecommunications, and Computer Science, 2006. TCSET 2006. International Conference
Conference_Location :
Lviv-Slavsko
Print_ISBN :
966-553-507-2
DOI :
10.1109/TCSET.2006.4404553
