DocumentCode
2398087
Title
Hardware/Software Method of Digital SoC Verification
Author
Hahanov, Vladimir ; Kiyaschenko, Anna ; Parfeniy, Alexander ; Ktiaman, Hassan
Author_Institution
Kharkiv Nat. Univ. of Radio Electron., Kharkiv
fYear
2006
fDate
Feb. 28 2006-March 4 2006
Firstpage
384
Lastpage
387
Abstract
Digital SoC diagnosing and functional verification method, using assertion mechanism, is offered. Method is effective as for early stages of design, and as for implementation phase, where the IEEE 1500 SECT standard technologies are used for signals observation.
Keywords
hardware-software codesign; system-on-chip; IEEE 1500 SECT standard technology; assertion mechanism; digital SoC verification; hardware-software method; Costs; Electronic design automation and methodology; Electronic equipment testing; Equations; Hardware; Process design; Redundancy; Signal design; System testing; Time to market; IEEE 1500 SECT; SoC; assertion; diagnosis; verification;
fLanguage
English
Publisher
ieee
Conference_Titel
Modern Problems of Radio Engineering, Telecommunications, and Computer Science, 2006. TCSET 2006. International Conference
Conference_Location
Lviv-Slavsko
Print_ISBN
966-553-507-2
Type
conf
DOI
10.1109/TCSET.2006.4404559
Filename
4404559
Link To Document