DocumentCode
2398910
Title
RVLSI applications and physical design
Author
Anderson, Allan H. ; Berger, Robert ; Konkle, Kenneth H. ; Rhodes, F. Matthew
Author_Institution
MIT Lincoln Lab., Lexington, MA, USA
fYear
1989
fDate
3-5 Jan 1989
Firstpage
39
Lastpage
45
Abstract
Improvements in circuits density and yield have permitted restructurable VLSI wafer-scale circuits to be designed with three million transistors. The integrated power supply decoupling capacitors and denser wafer-scale interconnect used in these designs are described. Improved testing methods are required for larger designs
Keywords
VLSI; integrated circuit testing; laser beam machining; redundancy; circuits density; integrated power supply decoupling capacitors; physical design; restructurable VLSI; testing methods; wafer-scale circuits; wafer-scale interconnect; yield; Clocks; Foundries; Integrated circuit interconnections; Integrated circuit yield; Laboratories; Power capacitors; Power supplies; Power system interconnection; Radar tracking; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Wafer Scale Integration, 1989. Proceedings., [1st] International Conference on
Conference_Location
San Francisco, CA
Print_ISBN
0-8186-9901-9
Type
conf
DOI
10.1109/WAFER.1989.47534
Filename
47534
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