DocumentCode :
2400183
Title :
GrapMG: Cost-effective module generation
Author :
Janssen, H.A.V. ; Treffers, M.A. ; Segers, R.H.J. ; Huisken, J.A.
Author_Institution :
Philips Res. Labs., Eindhoven, Netherlands
fYear :
1989
fDate :
20-22 Sept. 1989
Firstpage :
68
Lastpage :
71
Abstract :
GrapMG is a module generator environment in which an IC-designer is able to make parametrized layout modules in a flexible way. With grapMG some very complex modules have been designed for use in a silicon compiler for digital signal processing chips. Successful application of module generation in this compiler is made possible because a new design strategy simplifies the adaptation of modules to other technologies. The investment in the development of new modules is small compared to traditional procedural methods. In this paper the design strategy is presented together with the facilities that are available in the module design environment.
Keywords :
compiler generators; digital signal processing chips; elemental semiconductors; integrated circuit layout; modules; silicon; GrapMG; IC-designer; Si; cost-effective module generation; digital signal processing chips; parametrized layout modules; silicon compiler; Compaction; Costs; Digital signal processing chips; Investments; Laboratories; Libraries; Signal design; Silicon compiler; Space technology; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1989. ESSCIRC '89. Proceedings of the 15th European
Conference_Location :
Vienna
Print_ISBN :
3-85403-101-7
Type :
conf
DOI :
10.1109/ESSCIRC.1989.5468187
Filename :
5468187
Link To Document :
بازگشت