DocumentCode
2400356
Title
Passive Silicon Carrier High Performance Package for VLSI
Author
Schettler, H. ; Kreuter, V.
Author_Institution
IBM Labs., Boeblingen, Germany
fYear
1989
fDate
20-22 Sept. 1989
Firstpage
27
Lastpage
30
Abstract
A silion-on-silicon package for 9 VLSI chips is presented. The carrier is especially designed to support the high frequency current surges of complementary logic like CMOS or BICMOS. It contains integrated decoupling capacitors and uses 3 layers of metal. The chips are mounted via ´controlled collapse chip connection´. A /370 processor containing 9 CMOS chips has been assembled.Functionality and manufacturability have successfully been demonstrated.
Keywords
BiCMOS logic circuits; CMOS logic circuits; VLSI; elemental semiconductors; integrated circuit packaging; silicon; BICMOS; CMOS chips; Si; VLSI chips; complementary logic; integrated decoupling capacitors; passive carrier high performance package; processor; silion-on-silicon package; BiCMOS integrated circuits; CMOS logic circuits; CMOS process; Capacitors; Frequency; Logic design; Packaging; Silicon; Surges; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1989. ESSCIRC '89. Proceedings of the 15th European
Conference_Location
Vienna
Print_ISBN
3-85403-101-7
Type
conf
DOI
10.1109/ESSCIRC.1989.5468199
Filename
5468199
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