DocumentCode
2400380
Title
Near-IR laser-based "tuning" of 50 nm transistors
Author
Rowlette, Jeremy A. ; Eiles, T.M.
Volume
2
fYear
2003
fDate
27-28 Oct. 2003
Firstpage
664
Abstract
In order to demonstrate the scalability of the laser assisted device alteration (LADA) technique to the 90 nm node, laser "tuning" of a 50 nm channel length 10 μm gate width PMOS transistor fabricated on the 90 nm generation process technology is demonstrated here for the first time.
Keywords
MOSFET; circuit tuning; failure analysis; integrated circuit design; integrated circuit testing; laser beam effects; LADA technique scalability; PMOS transistor; channel length; laser assisted device alteration; near-IR laser-based tuning; Circuits; Laser tuning; MOSFETs; Microprocessors; Performance analysis; Photoconductivity; Semiconductor lasers; Silicon; Testing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Lasers and Electro-Optics Society, 2003. LEOS 2003. The 16th Annual Meeting of the IEEE
ISSN
1092-8081
Print_ISBN
0-7803-7888-1
Type
conf
DOI
10.1109/LEOS.2003.1252975
Filename
1252975
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