Quantifying yield impact of polishing induced defect on the silicon surface

Author

Ohta, Hideo ; Moon, Byeong Sam ; Jea Gun Park ; Hyun Lee, Sang ; Hoon An, Jeong ; Hong, Kwon ; Watanabe, Tetsuya ; Ichinose, Katsuhiko ; Nemoto, Kazunori ; Ki Park, Sung

Author_Institution

Semicond. Equip. Bus. Group, Hitachi High-Technol. Corp., Tokyo, Japan

fYear

2009

fDate

10-12 May 2009

Firstpage

41

Lastpage

45

Abstract

The impact of PIDs on device yield was evaluated by detecting PIDs and performing a correlation analysis between the PID detection results and device yield of a probing test. It was consequently confirmed that PID can be detected sensitively with suitable wafer-surface inspection and SEM tools. It was also confirmed that PID correlates with device yield and that gate-dielectric defects are caused by PIDs. It is concluded that the PID is key factor in improving device yield, and we showed superior detection technology of PID.

Keywords

elemental semiconductors; flaw detection; inspection; polishing; scanning electron microscopy; silicon; SEM tools; Si; gate-dielectric defects; polishing induced defect; wafer-surface inspection; yield impact; Inspection; Light scattering; Moon; Nanotechnology; Particle scattering; Performance evaluation; Semiconductor materials; Shape; Silicon; Virtual manufacturing; AFM; Defect Inspection; Defect Review; EDS; Laser; PID; Polishing; SEM; Scattering; Silicon Wafer; Simulation; TEM; Yield;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Semiconductor Manufacturing Conference, 2009. ASMC '09. IEEE/SEMI

Conference_Location

Berlin

ISSN

1078-8743

Print_ISBN

978-1-4244-3614-9

Electronic_ISBN

1078-8743

Type

conf

DOI

10.1109/ASMC.2009.5155950

Filename

5155950