DocumentCode
2400634
Title
A 24-Bit Block Floating Point Digital Signal Processor
Author
Dixon, G.E. ; Heighway, T.J. ; Fox, J. ; Wadham, D. ; Williams, L.
Author_Institution
Plessey Res. Caswell Ltd., Towcester, UK
fYear
1989
fDate
20-22 Sept. 1989
Firstpage
3
Lastpage
6
Abstract
A CMOS 24-bit Block Floating Point Digital Signal Processor chip for Sonar applications is described. The device integrates data and program memory, two arithmetic processing elements, and address generator in a single chip providing a performance improvement of up to ten times that available using standard DSP devices for Sonar signal processing. The device has been implemented on a 1.4 micron two layer metal CMOS process.
Keywords
CMOS digital integrated circuits; digital signal processing chips; floating point arithmetic; sonar; CMOS block floating point digital signal processor chip; arithmetic processing element; program memory; size 1.4 micron; sonar application; sonar signal processing; two layer metal CMOS process; word length 24 bit; Bonding; CMOS logic circuits; Circuit noise; Circuit synthesis; Decoding; Digital signal processors; Noise generators; RLC circuits; Rails; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1989. ESSCIRC '89. Proceedings of the 15th European
Conference_Location
Vienna
Print_ISBN
3-85403-101-7
Type
conf
DOI
10.1109/ESSCIRC.1989.5468219
Filename
5468219
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