Title :
An Experimental Analog VLSI Neural Chip with On-Chip Back-Propagation Learning
Author :
Valle, Maurizio ; Caviglia, Daniele D. ; Bisio, Giacomo M.
Author_Institution :
VLSI Design Center, Univ. of Genoa, Genoa, Italy
Abstract :
An experimental analog VLSI neural chip is presented. The chip integrates 4 neurons and 32 synapses organized in a Single Layer Perceptron architecture with 8 inputs and 4 outputs. The neural computational units (neurons and synapses) feature on-chip learning capabilities following the Back-Propagation algorithm. The operation of the neural circuitry is fully analog. The chip has been fabricated through EUROCHIP using the standard ES2 1.5 μm CMOS N-well technology.
Keywords :
CMOS analogue integrated circuits; VLSI; backpropagation; electronic engineering computing; neural chips; perceptrons; 32 synapses; CMOS N-well technology; EUROCHIP; Single Layer Perceptron architecture; experimental analog VLSI neural chip; neural circuitry; on-chip back-propagation learning; size 1.5 mum; standard ES2; Analog computers; Biology computing; Buildings; CMOS technology; Circuits; Computer architecture; Neural network hardware; Neurons; Physics computing; Very large scale integration;
Conference_Titel :
Solid-State Circuits Conference, 1992. ESSCIRC '92. Eighteenth European
Conference_Location :
Copenhagen
Print_ISBN :
87-984232-0-7
DOI :
10.1109/ESSCIRC.1992.5468241
