Title :
Advances on yield learning through concurrent evaluation of design and process data
Author :
Appello, Davide ; Tancorre, Vincenzo ; Suzor, Christophe ; Hall, Michael ; Talluto, Salvatore ; Kekare, Sagar A.
Author_Institution :
STMicroelectronics Srl, Agrate Brianza, Italy
Abstract :
This paper presents advances in methodologies and tools for yield learning which are concurrently exploiting design, test and process data. In our experiments, we demonstrated how to understand yield losses correlated with excessive power drawn from the chip during functional electrical test of wafers.
Keywords :
integrated circuit testing; integrated circuit yield; design concurrent evaluation; electrical test; process data concurrent evaluation; wafers functional test; yield learning; yield losses; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Design for testability; Failure analysis; Logic; Paper technology; Process design; Reliability engineering; ATPG; hot spots; scan chain; systematic failures; volume diagnostics; yield learning;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference, 2009. ASMC '09. IEEE/SEMI
Conference_Location :
Berlin
Print_ISBN :
978-1-4244-3614-9
Electronic_ISBN :
1078-8743
DOI :
10.1109/ASMC.2009.5155984
