Title :
A new transitive closure algorithm with application to redundancy identification
Author :
Gaur, Vivek ; Agrawal, Vishwani D. ; Bushnell, Michael L.
Author_Institution :
Avant! Corp., Fremont, CA, USA
Abstract :
A new transitive closure algorithm is presented for implication graphs that contain partial implications. In the presence of partial implications, a vertex can assume the true state when all vertices that partially imply it become true. Such graphs provide a more complete representation of a logic circuit than is possible with the conventional pair-wise implications. An application of the new transitive closure algorithm to redundancy identification shows significantly improved results. Empirically, we find the computational complexity of transitive closure to be linear for the implication graphs of the ISCAS benchmark circuits
Keywords :
automatic test pattern generation; combinational circuits; communication complexity; graph theory; logic testing; redundancy; ISCAS benchmark circuits; computational complexity; implication graphs; logic circuit; partial implications; redundancy identification; transitive closure algorithm; vertex; Chromium; Conferences; Electronic equipment testing;
Conference_Titel :
Electronic Design, Test and Applications, 2002. Proceedings. The First IEEE International Workshop on
Conference_Location :
Christchurch
Print_ISBN :
0-7695-1453-7
DOI :
10.1109/DELTA.2002.994683
