DocumentCode :
2403709
Title :
Using partial element equivalent circuit full wave analysis and Pade Via Lanczos to numerically simulate EMC problems
Author :
Slone, Rodney Daryl ; Smith, William T. ; Bai, Zhaojun
Author_Institution :
Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USA
fYear :
1997
fDate :
18-22 Aug 1997
Firstpage :
608
Lastpage :
613
Abstract :
In this study, an approach for numerical modeling of transmission line-type interconnects is proposed. In order to achieve the accuracy of a full wave technique, partial element equivalent circuit (PEEC) analysis is used to model the interconnects. PEEC models do not require transmission lines to be parallel and nonuniform geometrical details can be included. PEEC models for electrically large interconnects, however, generate very large system matrices. Circuit simulations can be overly time consuming if conventional solution algorithms are used. In this study, the solutions are developed using a computationally efficient Pade Via Lanczos (PVL) algorithm. The PVL algorithm is an approximate method for extracting the dominant poles and residues of the system response. Once the poles and residues have been determined, it is straightforward to evaluate the time or frequency domain responses. In this paper, the particular PEEC modeling approach used to form the system matrices is outlined. A PVL algorithm which incorporates a measure of the error between the actual system response and the approximate system response is used to evaluate the PEEC models. PEEC-PVL simulations of interconnect models are compared to other analysis techniques such as Spice and AWE
Keywords :
electromagnetic compatibility; equivalent circuits; frequency-domain analysis; printed circuits; time-domain analysis; transmission line matrix methods; AWE; EMC problems; Pade Via Lanczos; Spice; circuit simulations; dominant poles; electrically large interconnects; frequency domain response; full wave analysis; nonuniform geometrical details; numerical simulation; parallel geometrical details; partial element equivalent circuit; system matrices; system response residues; time domain response; transmission line-type interconnects; Circuit analysis; Circuit simulation; Distributed parameter circuits; Equivalent circuits; Frequency domain analysis; Integrated circuit interconnections; LAN interconnection; Numerical models; Solid modeling; Transmission line matrix methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electromagnetic Compatibility, 1997. IEEE 1997 International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-4140-6
Type :
conf
DOI :
10.1109/ISEMC.1997.667751
Filename :
667751
Link To Document :
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