IA-32 execution layer: a two-phase dynamic translator designed to support IA-32 applications on Itanium®-based systems

Author

Baraz, Leonid ; Devor, Tevi ; Etzion, Orna ; Goldenberg, Shalom ; Skaletsky, Alex ; Wang, Yun ; Zemach, Yigal

fYear

2003

fDate

3-5 Dec. 2003

Firstpage

191

Lastpage

201

Abstract

IA-32 execution layer (IA-32 EL) is a new technology that executes IA-32 applications on Intel Itanium processor family systems. Currently, support for IA-32 applications on Itanium-based platforms is achieved using hardware circuitry on the Itanium processors. This capability will be enhanced with IA-32 EL - software that will ship with Itanium-based operating systems and will convert IA-32 instructions into Itanium instructions via dynamic translation. In this paper, we describe aspects of the IA-32 execution layer technology, including the general two-phase translation architecture and the usage of a single translator for multiple operating systems. The paper provides details of some of the technical challenges such as precise exception, emulation of FP, MMX, and Intel streaming SIMD extension instructions, and misalignment handling. Finally, the paper presents some performance results.

Keywords

data handling; microprocessor chips; operating systems (computers); program interpreters; IA-32 EL; IA-32 execution layer; IA-32 instructions; Intel Itanium processor family; Intel streaming SIMD extension instructions; Itanium instructions; Itanium processors; Itanium-based operating systems; Itanium-based platforms; Itanium-based systems; MMX; hardware circuitry; misalignment handling; multiple operating systems; two-phase dynamic translator; two-phase translation architecture; Microarchitecture;

fLanguage

English

Publisher

ieee

Conference_Titel

Microarchitecture, 2003. MICRO-36. Proceedings. 36th Annual IEEE/ACM International Symposium on

Print_ISBN

0-7695-2043-X

Type

conf

DOI

10.1109/MICRO.2003.1253195

Filename

1253195