• DocumentCode
    2403900
  • Title

    Power rail logic: a low power logic style for digital GaAs circuits

  • Author

    Chandna, A. ; Brown, R.B. ; Putti, D. ; Kibler, D.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
  • fYear
    1994
  • fDate
    16-19 Oct. 1994
  • Firstpage
    71
  • Lastpage
    74
  • Abstract
    This paper describes a new logic style called Power Rail Logic (PRL) which is compatible with DCFL circuits. Multiplexors, latches, flip-flops and exclusive-OR gates can be built using this logic style. Compared to DCFL, PRL uses fewer transistors, has larger noise margins, and up to 40% lower power-delay products. A test chip containing 32-bit barrel shifters designed in DCFL and in PRL, were successfully fabricated and tested. Test results are given for both circuits.
  • Keywords
    field effect logic circuits; flip-flops; gallium arsenide; integrated circuit noise; logic gates; GaAs; barrel shifters; digital GaAs circuits; exclusive-OR gates; flip-flops; latches; multiplexors; noise margins; power rail logic; power-delay products; Automatic control; BiCMOS integrated circuits; Circuit testing; Flip-flops; Gallium arsenide; Inverters; Latches; Logic circuits; Rails; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1994. Technical Digest 1994., 16th Annual
  • Conference_Location
    Phildelphia, PA, USA
  • ISSN
    1064-7775
  • Print_ISBN
    0-7803-1975-3
  • Type

    conf

  • DOI
    10.1109/GAAS.1994.636925
  • Filename
    636925
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2403900