DocumentCode
2404174
Title
Design of a Second Order CMOS Sigma-Delta A/D Converter with a 150 MHz Clock Rate
Author
Hallgren, B.
Author_Institution
CERN, Geneva, Switzerland
fYear
1992
fDate
21-23 Sept. 1992
Firstpage
103
Lastpage
106
Abstract
A continuous time filter current switching sigma delta converter operating at a frequency of 150 MHz has been developed in 2 μm CMOS technology. The design of the main components of the converter is described including a very high speed comparator, an integrator and a one bit D/A converter. Measurements show a 10 bit dynamic range with 9 bit resolution at an oversampling rate of 128.
Keywords
CMOS digital integrated circuits; comparators (circuits); continuous time filters; sigma-delta modulation; clock rate; comparator; continuous time filter; current switching; frequency 150 MHz; second order CMOS sigma-delta A/D converter; size 2 mum; word length 1 bit; word length 10 bit; word length 9 bit; CMOS technology; Circuits; Clocks; Delta-sigma modulation; Dynamic range; Filters; Latches; Switching converters; Transconductance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1992. ESSCIRC '92. Eighteenth European
Conference_Location
Copenhagen
Print_ISBN
87-984232-0-7
Type
conf
DOI
10.1109/ESSCIRC.1992.5468421
Filename
5468421
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