DocumentCode :
2404465
Title :
Fault tolerant systolic 2D array for DFT
Author :
Dohi, Yasunori ; Kubo, Tetsuhiro ; Ohkawa, Tomoyuki
Author_Institution :
Fac. of Eng., Yokohama Nat. Univ., Japan
Volume :
3
fYear :
1996
fDate :
5-10 Aug 1996
Firstpage :
1441
Abstract :
The authors propose an algorithm for Fourier transform on a systolic array and its implementation. This systolic array is designed to be fault tolerant and to be used for Fourier transform and matrix operations. FFT is more common as the algorithm of Fourier transformation, but overhead demands for communication among processors are very high, and are therefore very expensive and limit the number of users. The proposed system is a two dimensional systolic array of processing elements (PEs) with short connecting lines between adjacent PEs, making it easy to use a large number of PEs. It is also considered to be fault tolerant. The authors propose a Fourier transform on a 2-D systolic array. Its processing speed is O(√N), which is next to that of the FFT
Keywords :
discrete Fourier transforms; fault tolerant computing; parallel algorithms; systolic arrays; discrete Fourier transform algorithm; fault-tolerant systolic 2D array; matrix operations; processing elements; processing speed; Circuit faults; Discrete Fourier transforms; Fault tolerance; Fourier transforms; Hardware; Integrated circuit modeling; Joining processes; Large scale integration; Systolic arrays; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Electronics, Control, and Instrumentation, 1996., Proceedings of the 1996 IEEE IECON 22nd International Conference on
Conference_Location :
Taipei
Print_ISBN :
0-7803-2775-6
Type :
conf
DOI :
10.1109/IECON.1996.570595
Filename :
570595
Link To Document :
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